Wikinventia — Atlas of discoveries and inventions · Global Age

Planar process and integrated circuit on planar technology — Jean Hoerni and Robert Noyce

1959 AD · Transmission: Global
ElectronicsInventionNorth American

In 1959, Jean A. Hoerni (Fairchild Semiconductor) invented the planar process, a manufacturing technique that allows complete integrated circuits to be built on a single layer of silicon (wafer), protecting and isolating circuit elements with an oxide layer. Building on that technology, Robert N. Noyce designed the planar integrated circuit, solved differently from the germanium IC Jack Kilby had demonstrated at Texas Instruments in 1958: while Kilby's was a proof of concept with wired connections, Noyce's used the planar process itself to fabricate and interconnect all elements on the wafer, making it industrially scalable. This pair of inventions catapulted the semiconductor industry into the silicon IC era and laid the foundation for today's integrated circuit industry.

InstitutionFairchild Semiconductor
Historical regionPalo Alto, California, U.S.A.
Primary sourceNoyce, R.N. — U.S. Patent 2,981,877, filed July 30, 1959. Development of the planar process by Jean A. Hoerni, Fairchild Semiconductor, 1959.
Secondary sourceIEEE Engineering and Technology History Wiki — "Milestones: Semiconductor Planar Process and Integrated Circuit, 1959"
Original languageen
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