In February 1963, Frank Wanlass and Chih-Tang Sah, at Fairchild Semiconductor's R&D laboratory, presented at the International Solid-State Circuits Conference (ISSCC) the concept of CMOS logic circuits: combining p-channel and n-channel MOS transistors in a complementary symmetry configuration. The result was circuits with near-zero static power consumption (orders of magnitude lower than contemporary bipolar technologies). Wanlass patented the idea (U.S. Patent 3,356,858, filed June 1963, granted 1967). CMOS would go on to become the standard fabrication process for virtually all modern VLSI integrated circuits, from microprocessors to memory.